Reduction of Leakage Power in Half- Subtractor using AVL Technique based on 45nm CMOS Technology
نویسندگان
چکیده
منابع مشابه
Design a Low Power Half-Subtractor Using .90μm CMOS Technology
In this paper we are presenting a Half-Subtractor using Adaptive Voltage Level (AVL) technique consuming less power than the conventional one .The main objective is to design that half subtractor using either of the two adaptive voltage level(AVL) techniques to reduce the sub threshold leakage current which plays a very important role in the reduction of power dissipation. We can bring down the...
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ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2015
ISSN: 0975-8887
DOI: 10.5120/19504-1102